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MC74AC160 MC74ACT160 MC74AC162 MC74ACT162 Synchronous Presettable BCD Decade Counter
The MC74AC160/74ACT160 and MC74AC162/74ACT162 are high-speed synchronous decade counters operating in the BCD (8421) sequence. They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters. The MC74AC160/74ACT160 has an asynchronous Master Reset input that overrides all other inputs and forces the outputs LOW. The MC74AC162/74ACT162 has a Synchronous Reset input that overrides counting and parallel loading and allows all outputs to be simultaneously reset on the rising edge of the clock. * * * * * Synchronous Counting and Loading High-Speed Synchronous Expansion Typical Count Rate of 120 MHz Outputs Source/Sink 24 mA ACT160 and ACT162 Have TTL Compatible Inputs
VCC 16 TC 15 Q0 14 Q1 13 Q2 12 Q3 11 CET 10 PE 9 D SUFFIX CASE 751B-05 PLASTIC N SUFFIX CASE 648-08 PLASTIC
SYNCHRONOUS PRESETTABLE BCD DECADE COUNTER
1 *R
2 CP
3 P0
4 P1
5 P2
6 P3
7 CEP
8 GND
LOGIC SYMBOL
PIN NAMES CEP CET CP MR SR P0-P3 PE Q0-Q3 TC Count Enable Parallel Input Count Enable Trickle Input Clock Pulse Input (160) Asynchronous Master Reset Input (162) Synchronous Reset Input Parallel Data Inputs Parallel Enable Input Flip-Flop Outputs Terminal Count Output
PE P0 P1 P2 P3 CEP CET TC CP *R Q0 Q1 Q2 Q3
*MR for 160 *SR for 162
FACT DATA 5-1
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
FUNCTIONAL DESCRIPTION
The MC74AC160/74ACT160 and MC74AC162/74ACT162 count modulo-10 in the BCD (8421) sequence. From state 9 (HLLH) they increment to state 0 (LLLL). The clock inputs of all flip-flops are driven in parallel through a clock buffer. Thus all changes of the Q outputs (except due to Master Reset of the 160) occur as a result of, and synchronous with, the LOW-to-HIGH transition of the CP input signal. The circuits have four fundamental modes of operation, in order of precedence: asynchronous reset (160), synchronous reset (162), parallel load, count-up and hold. Five control inputs -- Master Reset (MR, 160), Synchronous Reset (SR,162), Parallel Enable (PE), Count Enable Parallel (CEP) and Count Enable Trickle (CET) -- determine the mode of operation, as shown in the Mode Select Table. A LOW signal on MR overrides all other inputs and asynchronously forces all outputs LOW. A LOW signal on SR overrides counting and parallel loading and allows all outputs to go LOW on the next rising edge of CP. A LOW signal on PE overrides counting and allows information on the Parallel Data (Pn) inputs to be loaded into the flip-flops on the next rising edge of CP. With PE and MR (160) or SR (162) HIGH, CEP and CET permit counting when both are HIGH. Conversely, a LOW signal on either CEP or CET inhibits counting. The MC74AC160/74ACT160 and MC74AC162/74ACT162 use D-type edge-triggered flip-flops and changing the SR, PE, CEP and CET inputs when the CP is in either state does not cause errors, provided that the recommended setup and hold times, with respect to the rising edge of CP, are observed. The Terminal Count (TC) output is HIGH when CET is HIGH and counter is in state 9. To implement synchronous multistage counters, the TC outputs can be used with the CEP and CET inputs in two different ways. Please refer to the MC74AC568 data sheet. The TC output is subject to decoding spikes due to internal race conditions and is therefore not recommended for use as a clock or asynchronous reset for flip-flops, counters or registers. In the MC74AC160/74ACT160 and MC74AC162/74ACT162 decade counters, the TC output is fully decoded and can only be HIGH in state 9. If a decade counter is preset to an illegal state, or assumes an illegal state when power is applied, it will return to the normal sequence within two counts, as shown in the State Diagram. Logic Equations: Count Enable = CEP* CET* PE TC = Q0* Q1* Q2* Q3* CET
MODE SELECT TABLE
*SR L H H H H PE X L H H H CET X X H L X CEP X X H X L Action on the Rising Clock Edge ( ) Reset (Clear) Load (Pn Qn) Count (Increment) No Change (Hold) No Change (Hold)
0 15 14 13 12
STATE DIAGRAM
1 2 3 4 5 6 7 11 10 9 8
*For 162 only H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
FACT DATA 5-2
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
LOGIC DIAGRAM
P0 PE 160 CEP CET 162 ONLY 162 P1 P2 P3
TC
CP
CP
160 ONLY D CD Q0
CP
CP Q
D Q Q0 DETAIL A DETAIL A DETAIL A DETAIL A
MR 160 SR 162 Q0 Q1 Q2 Q3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
MAXIMUM RATINGS*
Symbol VCC Vin Vout Iin Iout ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
FACT DATA 5-3
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Vin, Vout Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current -- High Output Current -- Low -40 25 VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 150 40 25 10 ns/V 8.0 140 85 -24 24 C C mA mA ns/V Typ 5.0 5.0 Max 6.0 5.5 VCC V Unit V
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level Input Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input Leakage Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 8.0 0.002 0.001 0.001 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 74AC TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 75 -75 80 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A V *VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 A V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
VIL
Maximum Low Level Input Voltage
V
VOH
Minimum High Level Output Voltage
V
V
A mA mA A
* All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
FACT DATA 5-4
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74AC160 AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3)
74AC160 Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Min fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL tPHL Maximum Count Frequency Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to TC Propagation Delay CP to TC Propagation Delay CET to TC Propagation Delay CET to TC Propagation Delay MR to Qn (AC160) Propagation Delay MR to TC 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 65 110 2.0 1.5 2.0 1.5 2.0 1.5 2.0 1.5 3.0 2.0 3.5 2.0 2.0 1.5 2.5 2.0 2.0 1.5 3.5 2.5 Max -- -- 12.0 9.0 12.0 9.0 12.0 9.0 12.0 9.0 15.0 11.0 14.5 11.0 10.5 7.5 11.5 9.0 12.0 9.5 15.0 12.0 74AC160 TA = -40C to +85C CL = 50 pF Min 60 95 1.5 1.0 1.5 1.5 1.5 1.0 1.5 1.5 2.5 1.5 2.5 2.0 1.5 1.0 2.0 1.5 1.5 1.0 3.0 2.0 Max -- -- 14.0 10.5 14.0 10.5 14.0 10.5 14.0 10.5 17.5 12.5 16.5 12.5 12.5 9.0 13.5 10.5 13.5 10.0 17.0 13.5 MHz ns ns ns ns ns ns ns ns ns ns 3-3 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 Unit Fig. No.
* Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
FACT DATA 5-5
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74AC162 AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3)
74AC162 Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Maximum Count Frequency Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to TC Propagation Delay CP to TC Propagation Delay CET to TC Propagation Delay CET to TC 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 80 125 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 12.0 9.0 12.0 9.0 12.0 9.0 12.0 9.0 15.0 11.0 14.0 11.0 10.0 7.0 11.0 8.0 TA = +25C CL = 50 pF Typ Max 74AC162 TA = -40C to +85C CL = 50 pF Min 60 100 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 13.5 10.5 13.5 10.5 13.5 10.5 13.5 10.5 17.0 13.0 16.0 13.0 11.5 8.5 12.5 9.5 Max MHz ns ns ns ns ns ns ns ns 3-3 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 Unit Fig. No.
*Voltage Range 3.3 V is 3.0 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
FACT DATA 5-6
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74AC160 AC OPERATING REQUIREMENTS
74AC160 Symbol Parameter VCC* (V) TA = +25C CL = 50 pF 74AC160 TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Maximum ts th ts th ts th tw tw tw trec Setup Time, HIGH or LOW Pn to CP Hold Time, HIGH or LOW Pn to CP Setup Time, HIGH or LOW PE or SR to CP Hold Time, HIGH or LOW PE or SR to CP Setup Time, HIGH or LOW CEP or CET to CP Hold Time, HIGH or LOW CEP or CET to CP Clock Pulse Width (Load) HIGH or LOW Clock Pulse Width (Count) HIGH or LOW MR Pulse Width, LOW (AC160) Recovery Time MR to CP (AC160) 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 13.5 8.5 -1.0 0 11.5 7.5 0 0.5 6.0 4.5 0 0 4.0 3.0 7.0 4.5 5.5 4.5 - 0.5 0 16.0 10.5 - 0.5 0 14.0 8.5 0 1.0 7.0 5.0 0 0.5 5.0 3.5 7.5 5.5 7.5 6.0 0 0.5 ns ns ns ns ns ns ns ns ns ns 3-9 3-9 3-9 3-9 3-9 3-9 3-6 3-6 3-6 3-9
* Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
FACT DATA 5-7
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74AC162 AC OPERATING REQUIREMENTS
74AC162 Symbol Parameter VCC* (V) Typ ts th ts th ts th ts th tw tw Setup Time, HIGH or LOW Pn to CP Hold Time, HIGH or LOW Pn to CP Setup Time, HIGH or LOW PE to CP Hold Time, HIGH or LOW PE to CP Setup Time, HIGH or LOW CEP or CET to CP Hold Time, HIGH or LOW CEP or CET to CP Setup Time, HIGH or LOW SR to CP Hold Time, HIGH or LOW SR to CP Clock Pulse Width (Load) HIGH or LOW Clock Pulse Width (Count) HIGH or LOW 3.3 5.0 3.3 5.0 3.3 3.3 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 TA = +25C CL = 50 pF 74AC162 TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Minimum 8.0 5.0 0.5 0.5 10.0 6.0 0.5 0.5 6.0 4.0 0.5 0.5 8.0 6.0 0.5 0.5 5.5 4.5 5.0 4.0 9.0 6.0 1.0 1.0 11.0 7.0 1.0 1.0 7.0 5.0 1.0 1.0 9.0 7.0 1.0 1.0 6.0 5.0 5.5 4.5 ns ns ns ns ns ns ns ns ns ns 3-9 3-9 3-9 3-9 3-9 3-9 3-9 3-9 3-6 3-6
*Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
FACT DATA 5-8
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
DC CHARACTERISTICS
74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN ICCT IOLD IOHD ICC Maximum Input Leakage Current Additional Max. ICC/Input Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 5.5 8.0 0.6 0.001 0.001 1.5 1.5 1.5 1.5 4.49 5.49 74ACT TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.1 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 1.5 75 -75 80 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A *VIN = VIL or VIH -24 mA IOH -24 mA IOUT = 50 A *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI = VCC - 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
V
V
V
A mA mA mA A
* All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
FACT DATA 5-9
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74ACT160 AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3)
74ACT160 Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL tPHL Maximum Count Frequency Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to TC Propagation Delay CP to TC Propagation Delay CET to TC Propagation Delay CET to TC Propagation Delay MR to Qn (AC160) Propagation Delay MR to TC 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 120 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 1.5 2.5 6.0 6.0 6.0 6.0 8.0 8.0 6.0 7.0 6.0 -- 10.0 10.0 10.0 10.0 12.0 12.0 8.5 9.5 9.5 13.0 TA = +25C CL = 50 pF Typ Max 74ACT160 TA = -40C to +85C CL = 50 pF Min 100 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 1.5 2.5 11.0 11.0 11.0 11.0 14.0 14.0 9.5 11.0 11.0 14.0 Max MHz ns ns ns ns ns ns ns ns ns ns 3-3 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 Unit Fig. No.
* Voltage Range 5.0 V is 5.0 V 0.5 V.
FACT DATA 5-10
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74ACT162 AC CHARACTERISTICS (For Figures and Waveforms -- See Section 3)
74ACT162 Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Maximum Count Frequency Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input HIGH) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to Qn (PE Input LOW) Propagation Delay CP to TC Propagation Delay CP to TC Propagation Delay CET to TC Propagation Delay CET to TC 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 120 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 6.0 6.0 6.0 6.0 8.0 8.0 6.0 6.0 10.0 10.0 10.0 10.0 13.0 13.0 9.0 9.0 TA = +25C CL = 50 pF Typ Max 74ACT162 TA = -40C to +85C CL = 50 pF Min 100 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 11.5 11.0 11.5 11.0 14.5 14.5 10.5 10.5 Max MHz ns ns ns ns ns ns ns ns 3-3 3-6 3-6 3-6 3-6 3-6 3-6 3-6 3-6 Unit Fig. No.
* Voltage Range 5.0 V is 5.0 V 0.5 V. 3
FACT DATA 5-11
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74ACT160 AC OPERATING REQUIREMENTS
74ACT160 Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Typ ts th ts th ts th tw tw tw trec Setup Time, HIGH or LOW Pn to CP Hold Time, HIGH or LOW Pn to CP Setup Time, HIGH or LOW PE or MR to CP Hold Time, HIGH or LOW PE or MR to CP Setup Time, HIGH or LOW CEP or CET to CP Hold Time, HIGH or LOW CEP or CET to CP Clock Pulse Width (Load) HIGH or LOW Clock Pulse Width (Count) HIGH or LOW MR Pulse Width, LOW (ACT160) Recovery Time MR to CP (ACT160) 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 4.0 -4.0 4.0 -4.0 3.0 -3.0 3.0 3.0 2.0 -1.0 74ACT160 TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Maximum 6.5 -0.5 8.5 0 6.0 0 4.0 4.0 4.0 0 8.0 0 10.5 0 7.0 0 4.0 4.0 6.0 0 ns ns ns ns ns ns ns ns ns ns 3-9 3-9 3-9 3-9 3-9 3-9 3-6 3-6 3-6 3-9
* Voltage Range 5.0 V is 5.0 V 0.5 V.
FACT DATA 5-12
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
MC74ACT162 AC OPERATING REQUIREMENTS
74ACT162 Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Typ ts th ts th ts th ts th tw tw Setup Time, HIGH or LOW Pn to CP Hold Time, HIGH or LOW Pn to CP Setup Time, HIGH or LOW PE to CP Hold Time, HIGH or LOW PE to CP Setup Time, HIGH or LOW SR to CP Hold Time, HIGH or LOW SR to CP Setup Time, HIGH or LOW CET to CP Hold Time, HIGH or LOW CET to CP Clock Pulse Width (Load) HIGH or LOW Clock Pulse Width (Count) HIGH or LOW 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 4.0 -3.0 4.0 -3.0 5.0 -5.0 3.0 -3.0 2.0 2.0 74ACT162 TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Maximum 7.0 -1.0 7.0 -1.0 10 0 6.0 0 4.5 4.0 10.0 0 10.0 0 11.5 0 7.0 0 5.0 4.5 ns ns ns ns ns ns ns ns ns ns 3-9 3-9 3-9 3-9 3-9 3-9 3-9 3-9 3-6 3-6
* Voltage Range 5.0 V is 5.0 V 0.5 V.
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 45 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V
FACT DATA 5-13
MC74AC160 MC74ACT160 MC74AC162 MC74ACT162
OUTLINE DIMENSIONS
N SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R
9
-A-
16
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
-A-
D SUFFIX PLASTIC SOIC PACKAGE CASE 751B-05 ISSUE J
9
16
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
DIM A B C D F G J K M P R
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FACT DATA 5-14
*MC74AC160/D*
MC74AC160/D

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